1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device which is suitable for manufacturing a large number of kinds of products.
2. Description of the Related Art
In a prior art method for manufacturing a semiconductor device such as a MOS device (see JP-A-3-196655 & JP-A-3-268441), probe pads are formed simultaneously with formation of a lower aluminum wiring layer to complete a monitoring MOS element. Then, a test operation is performed by placing probes onto the probe pads upon the monitoring MOS element. This will be explained later in detail.
In the above-described prior art method, however, even when the test operation indicates that the monitoring MOS element has failed to save the post-stage processes of the device, the manufacturing yield is low.
In order to improve the manufacturing yield, it has been suggested that the probe pads be formed simultaneously with the formation of the gate electrode layer (see JP-A-1-194433, JP-A-1-201964 & JP-A-4-215451). Even in this case, after the test operation indicates that the monitoring MOS element has failed, the post-stage processes of the device are saved, which may increase the manufacturing yield. However, if such devices are scrapped, the manufacturing yield is still low.